Huawei unveils new scaling law and tech that narrows gap with TSMC, Samsung
The Chinese tech giant’s breakthrough is a major milestone in its mission to create a self-reliant semiconductor ecosystem
Huawei Technologies has unveiled a new scaling law and chip architecture intended to deliver transistor performance equivalent to a 1.4-nanometre process node – representing the leading edge of semiconductor development – in a few years without relying on advances in lithography tools.
The move represents a significant step by the Chinese tech giant to establish a self-reliant semiconductor ecosystem.
The company claims the new Tau (τ) Scaling Law, which was presented on Monday by He Tingbo, chairwoman of the Huawei Scientist Committee and president of the company’s semiconductor business department, is a new principle guiding “evolution of both semiconductors and electronic systems”.
Based on the law, He also unveiled an innovative core technology called LogicFolding architecture, which can reduce the resistive and capacitive load of signal propagation, ultimately boosting transistor density. The company expects its self-developed high-end chips, based on the new scaling law, to feature transistor density equivalent to 1.4nm processes by 2031.
Improvements in lithography tooling – a critical bottleneck in China’s semiconductor manufacturing – will no longer be indispensable under Huawei’s new path, He said in a press briefing on Monday.
Chinese companies are currently barred from accessing the most advanced extreme ultraviolet (EUV) lithography machines, which are traditionally required for the production of powerful chips at the 3nm and lower process nodes, under US-led sanctions.